Hardware Translation Coherence for Virtualized Systems

摘要

To improve system performance, modern operating systems (OSes) oftenundertake activities that require modification of virtual-to-physical pagetranslation mappings. For example, the OS may migrate data between physicalframes to defragment memory and enable superpages. The OS may migrate pages ofdata between heterogeneous memory devices. We refer to all such activities aspage remappings. Unfortunately, page remappings are expensive. We show thattranslation coherence is a major culprit and that systems employingvirtualization are especially badly affected by their overheads. In response,we propose hardware translation invalidation and coherence or HATRIC, a readilyimplementable hardware mechanism to piggyback translation coherence atopexisting cache coherence protocols. We perform detailed studies using KVM-basedvirtualization, showing that HATRIC achieves up to 30% performance and 10%energy benefits, for per-CPU area overheads of 2%. We also quantify HATRIC'sbenefits on systems running Xen and find up to 33% performance improvements.